[no subject]

Call me when you are ready to play :)

I suspect that dual cores will be good for situations that require very
closely coupled looping caluculations. The latency between cores should
be _really_ low. 

However, the datasheets I have looked at show something I don't like,
shared L1 and L2 cache. I don't recall if this is entirely accurate or
not or if it was a "special" version. It seems to me that a shared L1 is
asking for trouble. Shared L2 (the deepest data cache) would also be a
problem as both core would not be working on the same data thus
requiring a page out.

Hmmm.

> Dow
> 
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