[no subject]

On Wed, Apr 14, 2004 at 01:21:33PM -0400, Jeff Layton wrote:
> It generally hurts our CFD codes. It also hurts all but one of the
> NPB codes (which are CFD). We turn it off for now.
> 
> Maybe in the future when a real multi-core chip comes out
> we can revisit it. Multi-core chips also give rise to the possibility
> of doing multi-level parallelism usch as MPI+OpenMP.
> 
> Jeff
> 
> -- 
> Dr. Jeff Layton
> Aerodynamics and CFD
> Lockheed-Martin Aeronautical Company - Marietta
> 

-- 
Steven A. DuChene     linux-clusters at mindspring.com
                      sduchene at mindspring.com


</pre>
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<li><strong><a name="00503" href="msg00503.html">[ale] Hyperthreading</a></strong>
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<li><strong><a name="00477" href="msg00477.html">[ale] Hyperthreading</a></strong>
<ul><li><em>From:</em> mmillson at meritonlinesystems.com (Mike Millson)</li></ul></li>
<li><strong><a name="00478" href="msg00478.html">[ale] Hyperthreading</a></strong>
<ul><li><em>From:</em> jonathan.glass at ibb.gatech.edu (Jonathan Glass)</li></ul></li>
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<li><strong><a name="00495" href="msg00495.html">[ale] Hyperthreading</a></strong>
<ul><li><em>From:</em> linux-clusters at mindspring.com (Steven A. DuChene)</li></ul></li>
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<ul><li><em>From:</em> jonathan.glass at ibb.gatech.edu (Jonathan Glass)</li></ul></li>
<li><strong><a name="00498" href="msg00498.html">[ale] Hyperthreading</a></strong>
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